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? semiconductor components industries, llc, 2016 october, 2016 ? rev. 0 1 publication order number: ncp163/d ncp163 250 ma, ultra-low noise and high psrr ldo regulator for rf and analog circuits the ncp163 is a next generation of high psrr, ultra?low noise ldo capable of supplying 250 ma output current. designed to meet the requirements of rf and sensitive analog circuits, the ncp163 device provides ultra?low noise, high psrr and low quiescent current. the device also offer excelent load/line transients. the ncp163 is designed to work with a 1 uf input and a 1 f output ceramic capacitor. it is available in two thickness ultra?small 0.35p, 0.65 mm x 0.65 mm chip scale package (csp) and xdfn4 0.65p, 1 mm x 1 mm. features ? operating input voltage range: 2.2 v to 5.5 v ? available in fixed voltage option: 1.2 v to 5.3 v ? 2% accuracy over load/temperature ? ultra low quiescent current typ. 12 a ? standby current: typ. 0.1 a ? very low dropout: 80 mv at 250 ma ? ultra high psrr: typ. 92 db at 20 ma, f = 1 khz ? ultra low noise: 6.5 v rms ? stable with a 1 f small case size ceramic capacitors ? available in ?wlcsp4 0.65 mm x 0.65 mm x 0.33 mm ?wlcsp4 0.65 mm x 0.65 mm x 0.4 mm ?xdfn4 1 mm x 1 mm x 0.4 mm ? these devices are pb?free, halogen free/bfr free and are rohs compliant typical applications ? battery?powered equipment ? wireless lan devices ? smartphones, tablets ? cameras, dvrs, stb and camcorders in en gnd out off on figure 1. typical application schematics v out c out 1 f ceramic v in ncp163 c in 1 f ceramic wlcsp4 case 567ka marking diagrams www. onsemi.com x or xx = specific device code m = date code see detailed ordering, marking and shipping information on page 11 of this data sheet. ordering information pin connections xdfn4 case 711aj a1 a2 b1 b2 in out en gnd (top view) (top view) wlcsp4 case 567jz a1 x 1 xx m 1 a1 x
ncp163 www. onsemi.com 2 figure 2. simplified schematic block diagram in thermal shutdown mosfet driver with current limit integrated soft?start bandgap reference enable logic en out gnd en * active discharge version a only pin function description pin no. wlcsp4 pin no. xdfn4 pin name description a1 4 in input voltage supply pin a2 1 out regulated output voltage. the output should be bypassed with small 1 f ceramic capacitor. b1 3 en chip enable: applying v en < 0.4 v disables the regulator, pulling v en > 1.2 v enables the ldo. b2 2 gnd common ground connection ? epad epad expose pad can be tied to ground plane for better power dissipation absolute maximum ratings rating symbol value unit input voltage (note 1) v in ?0.3 v to 6 v output voltage v out ?0.3 to v in + 0.3, max. 6 v v chip enable input v ce ?0.3 to v in + 0.3, max. 6 v v output short circuit duration t sc unlimited s maximum junction temperature t j 150 c storage temperature t stg ?55 to 150 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v esd capability, charged device model (note 2) esd cdm 1000 v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. refer to electrical characteristics and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per eia/jesd22?a114 esd machine model tested per eia/jesd22?a115 esd charged device model tested per eia/jesd22?c101, field induced charge model latchup current maximum rating tested per jedec standard: jesd78. thermal characteristics rating symbol value unit thermal characteristics, wlcsp4 (note 3), thermal resistance, junction?to?air r ja 108 c/w thermal characteristics, xdfn4 (note 3), thermal resistance, junction?to?air 198.1 3. measured according to jedec board specification. detailed description of the board can be found in jesd51?7
ncp163 www. onsemi.com 3 electrical characteristics ?40 c t j 125 c; v in = v out(nom) + 1 v; i out = 1 ma, c in = c out = 1 f, unless otherwise noted. v en = 1.2 v. typical values are at t j = +25 c (note 4). parameter test conditions symbol min typ max unit operating input voltage v in 2.2 5.5 v output voltage accuracy v in = (v out(nom) + 1 v) to 5.5 v 0 ma i out 250 ma v out ?2 +2 % v in = (v out(nom) + 1 v) to 5.5 v 0 ma i out 250 ma (for v out < 1.8 v, xdfn4 package) v out ?3 +3 % line regulation v out(nom) + 1 v v in 5.5 v line reg 0.02 %/v load regulation i out = 1 ma to 250 ma load reg 0.001 %/ma dropout voltage (note 5) i out = 250 ma v out(nom) = 3.3 v v do 80 145 mv output current limit v out = 90% v out(nom) i cl 250 700 ma short circuit current v out = 0 v i sc 690 quiescent current i out = 0 ma i q 12 20 a shutdown current v en 0.4 v, v in = 4.8 v i dis 0.01 1 a en pin threshold voltage en input voltage ?h? v enh 1.2 v en input voltage ?l? v enl 0.4 en pull down current v en = 4.8 v i en 0.2 0.5 a turn?on time c out = 1 f, from assertion of v en to v out = 95% v out(nom) 120 s power supply rejection ratio i out = 20 ma f = 100 hz f = 1 khz f = 10 khz f = 100 khz psrr 91 92 85 60 db output voltage noise f = 10 hz to 100 khz i out = 1 ma i out = 250 ma v n 8.0 6.5 v rms thermal shutdown threshold temperature rising t sdh 160 c temperature falling t sdl 140 c active output discharge resistance v en < 0.4 v, version a only r dis 280 line transient (note 6) v in = (v out(nom) + 1 v) to (v out(nom) + 1.6 v) in 30 s, i out = 1 ma tran line ?1 mv v in = (v out(nom) + 1.6 v) to (v out(nom) + 1 v) in 30 s, i out = 1 ma +1 load transient (note 6) i out = 1 ma to 200 ma in 10 s tran load ?40 mv i out = 200 ma to 1ma in 10 s +40 product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. performance guar anteed over the indicated operating temperature range by design and/or characterization. production tested at t a = 25 c. low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possibl e. 5. dropout voltage is characterized when v out falls 100 mv below v out(nom) . 6. guaranteed by design.
ncp163 www. onsemi.com 4 typical characteristics figure 3. output voltage vs. temperature ? v out = 1.8 v ? xdfn package figure 4. output voltage vs. temperature ? v out = 3.3 v ? xdfn package t j , junction temperature ( c) t j , junction temperature ( c) 120 100 80 60 20 0 ?20 ?40 1.780 1.785 1.790 1.810 1.800 1.805 1.815 1.820 120 100 80 60 40 0 ?20 ?40 3.330 figure 5. output voltage vs. temperature ? v out = 5.0 v ? xdfn package t j , junction temperature ( c) 120 100 80 40 20 0 ?20 ?40 4.990 5.040 figure 6. line regulation vs. temperature ? v out = 1.8 v t j , junction temperature ( c) 120 100 80 60 20 0 ?20 ?40 0.050 v out , output voltage (v) v out , output voltage (v) v out , output voltage (v) reg line , line regulation (%/v) 40 140 1.795 i out = 10 ma i out = 250 ma v in = 2.8 v v out = 1.8 v c in = 1 f c out = 1 f 20 140 i out = 10 ma i out = 250 ma v in = 4.3 v v out = 3.3 v c in = 1 f c out = 1 f i out = 10 ma i out = 250 ma v in = 5.5 v v out = 5.0 v c in = 1 f c out = 1 f 60 140 40 140 v in = 2.8 v v out = 1.8 v c in = 1 f c out = 1 f 1.825 1.830 3.325 3.320 3.315 3.310 3.305 3.295 3.290 3.285 3.280 5.035 5.030 5.025 5.020 5.015 5.010 5.005 5.000 4.995 0.040 0.030 0.020 0.010 0.000 ?0.010 ?0.020 ?0.030 ?0.040 ?0.050 figure 7. line regulation vs. temperature ? v out = 3.3 v figure 8. load regulation vs. temperature ? v out = 1.8 v t j , junction temperature ( c) t j , junction temperature ( c) 120 100 80 60 20 0 ?20 ?40 120 100 80 60 20 0 ?20 ?40 20 reg line , line regulation (%/v) 40 140 v in = 4.3 v v out = 3.3 v c in = 1 f c out = 1 f 40 140 v in = 2.8 v v out = 1.8 v c in = 1 f c out = 1 f reg load , load regulation (mv) 0.050 0.040 0.030 0.020 0.010 0.000 ?0.010 ?0.020 ?0.030 ?0.040 ?0.050 18 16 14 12 10 8 6 4 2 0
ncp163 www. onsemi.com 5 typical characteristics figure 9. load regulation vs. temperature ? v out = 3.3 v figure 10. load regulation vs. temperature ? v out = 5.0 v t j , junction temperature ( c) t j , junction temperature ( c) 120 80 60 40 20 0 ?20 ?40 0 20 120 100 80 60 20 0 ?20 ?40 figure 11. ground current vs. load current ? v out = 1.8 v i out , output current (ma) 225 175 150 125 100 75 25 0 1500 reg load , load regulation (mv) reg load , load regulation (mv) i gnd , ground current ( a) 100 140 v in = 4.3 v v out = 3.3 v c in = 1 f c out = 1 f 40 140 v in = 5.5 v v out = 5.0 v c in = 1 f c out = 1 f 50 200 250 v in = 2.8 v v out = 1.8 v c in = 1 f c out = 1 f t j = 125 c t j = 25 c t j = ?40 c 18 16 14 12 10 8 6 4 2 0 20 18 16 14 12 10 8 6 4 2 1350 1200 1050 900 750 600 450 300 150 0 figure 12. ground current vs. load current ? v out = 3.3 v i out , output current (ma) 225 175 150 125 100 75 25 0 1500 i gnd , ground current ( a) 50 200 250 1350 1200 1050 900 750 600 450 300 150 0 t j = 125 c t j = 25 c t j = ?40 c v in = 4.3 v v out = 3.3 v c in = 1 f c out = 1 f figure 13. ground current vs. load current ? v out = 5.0 v figure 14. dropout voltage vs. load current ? v out = 1.8 v i out , output current (ma) i out , output current (ma) 225 175 150 125 75 50 25 0 0 225 200 150 125 100 50 25 0 250 i gnd , ground current (ma) v drop , dropout voltage (mv) v in = 5.5 v v out = 5.5 v c in = 1 f c out = 1 f t j = 125 c t j = 25 c t j = ?40 c 100 200 250 75 175 250 t j = 125 c t j = 25 c t j = ?40 c 1500 1350 1200 1050 900 750 600 450 300 150 0 v out = 1.8 v c in = 1 f c out = 1 f 225 200 175 150 125 100 75 50 25 0
ncp163 www. onsemi.com 6 typical characteristics figure 15. dropout voltage vs. load current ? v out = 3.3 v figure 16. dropout voltage vs. load current ? v out = 5.0 v i out , output current (ma) i out , output current (ma) 225 200 150 100 75 50 25 0 225 200 150 125 100 50 25 0 0 15 45 60 75 120 150 v drop , dropout voltage (mv) v drop , dropout voltage (mv) v out = 3.3 v c in = 1 f c out = 1 f t j = 125 c t j = 25 c t j = ?40 c 125 175 250 v out = 5.0 v c in = 1 f c out = 1 f t j = 125 c t j = 25 c t j = ?40 c 75 175 250 30 105 135 90 0 0 15 45 60 75 120 150 30 105 135 90 figure 17. output voltage noise spectral density ? v out = 1.8 v frequency (hz) 100k 10k 1000 100 10 output noise (nv/ hz ) 1m 1000 v in = 2.8 v v out = 1.8 v c in = 1 f c out = 1 f 1 ma 10 ma 250 ma rms output noise ( v) i out 1 ma 10 ma 250 ma 10 hz ? 100 khz 7.73 7.12 7.11 100 hz ? 100 khz 6.99 6.26 6.33 v in = 3.8 v v out = 2.8 v c in = 1 f c out = 1 f 100 10 1 figure 18. output voltage noise spectral density ? v ou t = 2.8 v frequency (hz) 100k 10k 1000 100 10 output noise (nv/ hz ) 1m 1000 rms output noise ( v) i out 1 ma 10 ma 250 ma 10 hz ? 100 khz 7.9 7.19 7.29 100 hz ? 100 khz 7.07 6.25 6.38 100 10 1 1 ma 10 ma 250 ma
ncp163 www. onsemi.com 7 typical characteristics figure 19. power supply rejection ? v out = 1.8 v figure 20. power supply rejection? v out = 3.3 v frequency (hz) frequency (hz) 100 10 rr, ripple rejection (db) rr, ripple rejection (db) 120 1 ma 10 ma 20 ma 100 ma 250 ma v in = 2.8 v+100mv pp v out = 1.8 v c out = 1 f mlcc 1206 100 80 60 40 20 1 ma 10 ma 20 ma 100 ma 250 ma v in = 4.3 v+100mv pp v out = 3.3 v c out = 1 f mlcc 1206 1000 10k 100k 1m 10m 100 10 120 100 80 60 40 20 1000 10k 100k 1m 10m 00 figure 21. power supply rejection ? v out = 5.0 v frequency (hz) 100 10 rr, ripple rejection (db) 120 100 80 60 40 20 1000 10k 100k 1m 10m 0 1 ma 10 ma 20 ma 100 ma 250 ma v in = 5.5 v+100mv pp v out = 5.0 v c out = 1 f mlcc 1206
ncp163 www. onsemi.com 8 applications information general the ncp163 is an ultra?low noise 250 ma low dropout regulator designed to meet the requirements of rf applications and high performance analog circuits. the ncp163 device provides very high psrr and excellent dynamic response. in connection with low quiescent current this device is well suitable for battery powered application such as cell phones, tablets and other. the ncp163 is fully protected in case of current overload, output short circuit and overheating. input capacitor selection (c in ) input capacitor connected as close as possible is necessary for ensure device stability. the x7r or x5r capacitor should be used for reliable performance over temperature range. the value of the input capacitor should be 1 f or greater to ensure the best dynamic performance. this capacitor will provide a low impedance path for unwanted ac signals or noise modulated onto constant input voltage. there is no requirement for the esr of the input capacitor but it is recommended to use ceramic capacitors for their low esr and esl. a good input capacitor will limit the influence of input trace inductance and source resistance during sudden load current changes. output decoupling (c out ) the ncp163 requires an output capacitor connected as close as possible to the output pin of the regulator. the recommended capacitor value is 1 f and x7r or x5r dielectric due to its low capacitance variations over the specified temperature range. the ncp163 is designed to remain stable with minimum ef fective capacitance of 0.7 f to account for changes with temperature, dc bias and package size. especially for small package size capacitors such as 0201 the ef fective capacitance drops rapidly with the applied dc bias. please refer figure 22. figure 22. capacity vs dc bias voltage there is no requirement for the minimum value of equivalent series resistance (esr) for the c out but the maximum value of esr should be less than 2 . larger output capacitors and lower esr could improve the load transient response or high frequency psrr. it is not recommended to use tantalum capacitors on the output due to their large esr. the equivalent series resistance of tantalum capacitors is also strongly dependent on the temperature, increasing at low temperature. enable operation the ncp163 uses the en pin to enable/disable its device and to deactivate/activate the active discharge function. if the en pin voltage is <0.4 v the device is guaranteed to be disabled. the pass transistor is turned?off so that there is virtually no current flow between the in and out. the active discharge transistor is active so that the output voltage v out is pulled to gnd through a 280 resistor. in the disable state the device consumes as low as typ. 10 na from the v in . if the en pin voltage >1.2 v the device is guaranteed to be enabled. the ncp163 regulates the output voltage and the active discharge transistor is turned?off. the en pin has internal pull?down current source with typ. value of 200 na which assures that the device is turned?off when the en pin is not connected. in the case where the en function isn?t required the en should be tied directly to in. output current limit output current is internally limited within the ic to a typical 700 ma. the ncp163 will source this amount of current measured with a voltage drops on the 90% of the nominal v out . if the output voltage is directly shorted to ground (v out = 0 v), the short circuit protection will limit the output current to 690 ma (typ). the current limit and short circuit protection will work properly over whole temperature range and also input voltage range. there is no limitation for the short circuit duration. thermal shutdown when the die temperature exceeds the thermal shutdown threshold (t sd ? 160 c typical), thermal shutdown event is detected and the device is disabled. the ic will remain in this state until the die temperature decreases below the thermal shutdown reset threshold (t sdu ? 140 c typical). once the ic temperature falls below the 140 c the ldo is enabled again. the thermal shutdown feature provides the protection from a catastrophic device failure due to accidental overheating. this protection is not intended to be used as a substitute for proper heat sinking. power dissipation as power dissipated in the ncp163 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature affect the rate of junction temperature rise for the part.
ncp163 www. onsemi.com 9 the maximum power dissipation the ncp163 can handle is given by: p d(max) 125 o c t a ja (eq. 1) the power dissipated by the ncp163 for given application conditions can be calculated from the following equations: p d v in i gnd i out v in v out
(eq. 2) figure 23. ja and p d (max) vs. copper area (csp4) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 80 90 100 110 120 130 140 150 160 0 100 200 300 400 500 600 700 pcb copper area (mm 2 ) ja , junction to ambient thermal resistance ( c/w) p d(max) , maximum power dissipation (w) ja , 2 oz cu ja , 1 oz cu p d(max) , t a = 25 c, 1 oz cu p d(max) , t a = 25 c, 2 oz cu figure 24. ja and p d (max) vs. copper area (xdfn4) 0.3 0.4 0.5 0.6 0.8 0.7 0.9 1.0 150 160 170 180 190 200 210 220 0 100 200 300 400 500 600 700 pcb copper area (mm 2 ) ja , junction to ambient thermal resistance ( c/w) p d(max) , maximum power dissipation (w) ja , 2 oz cu ja , 1 oz cu p d(max) , t a = 25 c, 1 oz cu p d(max) , t a = 25 c, 2 oz cu
ncp163 www. onsemi.com 10 reverse current the pmos pass transistor has an inherent body diode which will be forward biased in the case that v out > v in . due to this fact in cases, where the extended reverse current condition can be anticipated the device may require additional external protection. power supply rejection ratio the ncp163 features very high power supply rejection ratio. if desired the psrr at higher frequencies in the range 100 khz ? 10 mhz can be tuned by the selection of c out capacitor and proper pcb layout. turn?on time the turn?on time is defined as the time period from en assertion to the point in which v out will reach 98% of its nominal value. this time is dependent on various application conditions such as v out(nom) , c out , t a . pcb layout recommendations to obtain good transient performance and good regulation characteristics place c in and c out capacitors close to the device pins and make the pcb traces wide. in order to minimize the solution size, use 0402 or 0201 capacitors with appropriate capacity. larger copper area connected to the pins will also improve the device thermal resistance. the actual power dissipation can be calculated from the equation above (equation 2). expose pad can be tied to the gnd pin for improvement power dissipation and lower device temperature.
ncp163 www. onsemi.com 11 ordering information (wlcsp4) device voltage option marking rotation description package shipping ? ncp163afcs180t2g 1.8 v y 180 250 ma, active discharge wlcsp4 case 567ka (pb-free) 5000 / tape & reel NCP163AFCS260T2G 2.6 v 4 180 ncp163afcs280t2g 2.8 v 3 180 ncp163afcs285t2g 2.85 v 5 180 ncp163afcs290t2g 2.9 v 6 180 ncp163afcs2925t2g 2.925 v 2 180 ncp163bfcs180t2g 1.8 v y 270 250 ma, non?active discharge ncp163bfcs2925t2g 2.925 v 2 270 ncp163afct180t2g 1.8 v y 180 250 ma, active discharge wlcsp4 case 567jz (pb-free) 5000 / tape & reel ncp163afct260t2g 2.6 v 6 270 ncp163afct280t2g 2.8 v 3 180 ncp163afct285t2g 2.85 v 5 270 ncp163afct290t2g 2.9 v 4 270 ncp163afct2925t2g 2.925 v 2 180 ncp163afct300t2g 3.0 v 3 270 ncp163bfct180t2g 1.8 v y 270 250 ma, non?active discharge ncp163bfct2925t2g 2.925 v 2 270 ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. ordering information (xdfn4) device voltage option marking description package shipping ? ncp163amx120tbg* 1.2 v me 250 ma, active discharge xdfn4 case 711aj (pb-free) 3000 / tape & reel ncp163amx130tbg* 1.3 v mg ncp163amx180tbg 1.8 v ma ncp163amx1825tbg 1.825 v mc ncp163amx190tbg 1.9 v mh ncp163amx260tbg 2.6 v mn ncp163amx275tbg 2.75 v md ncp163amx280tbg 2.8 v mm ncp163amx285tbg 2.85 v mq ncp163amx290tbg 2.9 v mr ncp163amx300tbg 3.0 v mj ncp163amx330tbg 3.3 v mk ncp163amx500tbg 5.0 v ml ncp163bmx180tbg 1.8 v pa 250 ma, non?active discharge ncp163bmx1825tbg 1.825 v pc ncp163bmx275tbg 2.75 v pd ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *contact sales office for availability information.
ncp163 www. onsemi.com 12 package dimensions wlcsp4, 0.64x0.64 case 567jz issue a seating plane notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to spherical crowns of solder balls. dim a min nom ??? millimeters a1 d e b 0.195 0.210 e 0.35 bsc ??? e d a b pin a1 reference e a 0.03 b c 0.05 c 4x b 12 b a 0.05 c a a1 a2 c 0.04 0.06 top view side view bottom view note 3 e a2 0.23 ref pitch 0.20 4x dimensions: millimeters *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.35 0.35 recommended a1 package outline pitch max 0.610 0.640 0.610 0.640 0.225 0.33 0.08 0.670 0.670 wlcsp4, 0.64x0.64 case 567ka issue a seating plane notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to spherical crowns of solder balls. dim a min nom 0.35 millimeters a1 d e b 0.185 0.200 e 0.35 bsc 0.40 e d a b pin a1 reference e a 0.05 b c 0.03 c 0.05 c 4x b 12 b a 0.05 c a a1 a2 c 0.14 0.16 top view side view bottom view note 3 e a2 0.25 ref pitch 0.20 4x dimensions: millimeters *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.35 0.35 recommended a1 package outline pitch max 0.610 0.640 0.610 0.640 0.215 0.45 0.18 0.670 0.670
ncp163 www. onsemi.com 13 package dimensions xdfn4 1.0x1.0, 0.65p case 711aj issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.20 mm from the terminal tips. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 bottom view b e 4x note 3 2x 0.05 c pin one reference top view 2x 0.05 c a a1 (a3) 0.05 c 0.05 c c seating plane side view l 4x 1 2 dim min max millimeters a 0.33 0.43 a1 0.00 0.05 a3 0.10 ref b 0.15 0.25 d 1.00 bsc d2 0.43 0.53 e 1.00 bsc e 0.65 bsc l 0.20 0.30 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. mounting footprint* 1.20 0.26 0.24 4x dimensions: millimeters 0.39 recommended package outline note 4 e/2 d2 45 a m 0.05 b c 4 3 0.65 pitch detail a 4x b2 0.02 0.12 l2 0.07 0.17 4x 0.52 2x 0.11 4x l2 4x detail a b2 4x p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncp163/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. ?

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